Key Skills

Job Description

Company Description CloudHub is a technology solutions provider focused on accelerating insights and improving decision-making across sectors such as Life Sciences, Healthcare, BFSI, Retail, Manufacturing, and Logistics. The company offers services in cloud engineering, data engineering, security and compliance, enterprise search, and intelligent document processing. CloudHub is known for its strong understanding of business environments, security risks, and regulatory requirements, supported by a leading Security & Compliance Framework that helps customers maintain continuous security and compliance. Led by experienced professionals, including former Amazon and Microsoft team members, CloudHub uses a client-centric approach to deliver value at an accelerated pace and transform businesses with cutting-edge solutions. Role Description The Senior ASIC Validation Engineer role is a full-time, on-site position based in North Holland, Netherlands. This role involves planning, developing, and executing validation strategies for complex ASIC designs, including creating test plans, testbenches, and validation frameworks to ensure functional correctness and performance. The engineer will perform functional verification, debug hardware and RTL issues, collaborate closely with design and implementation teams, and drive root-cause analysis and resolution of defects. Day-to-day responsibilities include analyzing specifications, defining validation coverage, reviewing RTL and validation results, documenting findings, and contributing to continuous improvement of validation methodologies and tools. The role also includes mentoring less-experienced engineers, supporting design-for-testability initiatives, and coordinating with manufacturing and quality teams to ensure robust products. Qualifications Candidates should possess strong skills in RTL Design and related digital design methodologies. Candidates should possess strong skills in Validation and Functional Verification of complex ASICs or SoCs. Candidates should possess strong skills in Debugging of hardware, RTL, and system-level issues. Candidates should possess familiarity with Good Manufacturing Practice (GMP) or similar quality and reliability standards in semiconductor or hardware manufacturing. Solid understanding of digital electronics, ASIC/SoC architecture, and verification methodologies (e.g., UVM, SystemVerilog) is beneficial. Experience with simulation, emulation, and lab validation tools, as well as scripting languages (such as Python, Perl, or Shell), is preferred. Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience. Strong analytical and problem-solving abilities, effective communication skills, and the ability to work collaboratively in cross-functional teams. Experience in leading validation projects or mentoring engineers is an advantage.

Core Responsibilities

Plan, develop, and execute validation strategies for complex ASIC designs, including test plans, testbenches, and coverage, while verifying functionality and performance and debugging hardware and RTL issues. Lead defect root-cause analysis, document results, improve validation methods and tools, mentor engineers, support design-for-testability, and coordinate with design, manufacturing, and quality teams.

Requirements

Candidates should have strong RTL design, ASIC/SoC validation and functional verification, and hardware and system-level debugging skills, along with familiarity with GMP or comparable quality standards. A bachelor’s or master’s degree in electrical engineering, computer engineering, or a related field (or equivalent practical experience) is specified; knowledge of verification methodologies and validation tools, scripting experience, analytical and communication skills, and mentoring or project leadership experience are beneficial.