Key Skills

Job Description

Open role Principal Compute Architect, Reconfigurable Compute Our mission AI is becoming fundamental to how the world works. When it is, the ability to compute, and to manufacture the hardware that computes, should not be concentrated in a few places. Touchdown's mission is to make compute accessible to the whole world and to reindustrialize advanced semiconductor manufacturing in the United States. We co-design everything for next-generation compute: the AI systems people use, the software that serves them, the architectures and chips underneath, and the packaging, test, and manufacturing that make them real. Co-design brings down the complexity and cost of building compute. That is what makes manufacturing in America competitive again, and what puts compute within reach of people and companies everywhere. We build alongside the world's best manufacturing ecosystems, including Taiwan's, and every role here makes one layer better and carries what it learns to the rest. Why this role matters Co-design starts with architecture: deciding what the hardware should be, given the software and workloads it must run. This role sets that direction and keeps it honest against the best hardware available. Technical scope Architecture for AI and data-intensive workloads; performance, power, and area modeling; memory hierarchy and data movement; dataflow and parallelism; hardware and software co-design trade-offs; benchmarking against current accelerators; experiment design and go/no-go criteria. First 90 days Set architecture research priorities with the founders. Define how experiments are measured and when they stop. Lead technical direction across hardware, compiler, and AI EDA. What you will own Architecture direction and performance modeling. Experiment design and go/no-go decisions. Technical leadership across the compute team. What you bring 10+ years in computer architecture or accelerator design. Shipped or taped-out hardware, or widely used architecture research. Rigorous performance modeling. Has defined the architecture of a shipped accelerator, processor, or comparable system, or led influential architecture research. Builds and trusts quantitative performance and power models. Helpful experience AI accelerator design How we work AI-native by default. You use coding agents, AI-assisted analysis, and automation every day, and you check their output against measurements before anyone relies on it. We work alongside foundries, test houses, OSATs, and research labs, and we build with partners rather than against them. How the role works Full-time. Location: Santa Clara, CA Hsinchu, Taiwan. Openings: 1. Taiwan roles are employed through a local employer of record. Mandarin is a strong plus for Taiwan roles; English is required for written work. Pay: $230,000–$300,000 base (Santa Clara, CA). Ranges are base pay for U.S. roles and depend on location, experience, and level. Full-time roles also include equity and benefits. Taiwan pay is set to the local market and discussed in the first call. Start date and employment details are discussed during the process. Apply for this role → Applications are reviewed against the work described here. We do not use a degree, title, or keyword list as a substitute for evidence.

Core Responsibilities

Set architecture direction for AI and data-intensive workloads, build quantitative performance models, and design experiments with clear go/no-go criteria. Lead technical direction across the compute team and coordinate work across hardware, compiler, and AI EDA.

Requirements

Requires 10 or more years of experience in computer architecture or accelerator design, with shipped or taped-out hardware or widely used architecture research. Candidates should have defined the architecture of a shipped accelerator, processor, or comparable system, or led influential architecture research, and be able to build and validate quantitative performance and power models.

Benefits

• Equity
• Benefits